
I’ve been a trader and investor for 44 years. I left Wall Street long ago—-once I understood that their obsolete advice is designed to profit them, not you.
Today, my firm manages around $5 billion in ETFs, and I don’t answer to anybody. I tell the truth because trying to fool investors doesn’t help them, or me.
In Daily H.E.A.T. , I show you how to Hedge against disaster, find your Edge, exploit Asymmetric opportunities, and ride major Themes before Wall Street catches on.
Table of Contents
H.E.A.T.
~30%/yr Efficiency gains already baked into base-case demand model | ~5%/yr Modeled incremental efficiency rate — and decelerating | 372GB HBM3E per GB200 superchip (13.4TB per NVL72 rack) | ~75% KV traffic shift needed to balance supply in 2028 — impossible |
The most dangerous argument in memory markets is not that AI demand is fake. It is that AI memory demand self-corrects.
The version you hear at every investor conference goes like this: models get more efficient every year, so memory demand per token drops, so the HBM shortage loosens on its own, so you don't need to own the memory supply chain at premium valuations. It is a clean story. It is analytically satisfying. And we spent weeks trying to stress-test it.
The result is uncomfortable for the bears.
Efficiency is real. Google confirmed that tokens processed across its surfaces grew 7x over the past year — more than 3.2 quadrillion per month. But the HBM bull case does not require efficiency to disappear. It only requires efficiency to lose the race against token-growth, context-growth, and memory-per-system growth. That is the test we ran. The escape routes are not closed forever. For 2026–2028, they are too small, too slow, or too workload-specific to break the HBM shortage thesis. Here is exactly why.
PART I: THE SETUP — WHAT THE BASE CASE ACTUALLY ASSUMES
Before you can stress-test a model, you have to understand what it is already pricing in. And the baseline here is not naive.
Token growth is running 4 to 7x per year — Google confirmed the 7x figure at I/O this year. Yet the memory demand line in our model only grows approximately 40% annually. That gap — 7x token growth compressing to 40% memory growth — is not an oversight. It is the efficiency tailwind, already baked in. Roughly 30% per year of efficiency improvement is built into the baseline.
The mechanisms driving that 30% are well-documented: Multi-head Latent Attention cutting KV-cache requirements by 3 to 5x, FP8 to FP4 quantization, sparse attention architectures. Most of these were deployed in 2024 and 2025. They are not coming again. They were discrete architectural steps, not a continuous innovation conveyor belt.
The question is not whether efficiency is happening. It is whether efficiency can run fast enough and far enough to close the supply gap. That is a different and much harder question — and the answer is no.
"The efficiency tailwind is real. But it is already priced into the demand model — and the next increment is not big enough to close the gap." |
PART II: THE EFFICIENCY LEVER — WE MEASURED IT
To flip 2027–2028 into surplus, efficiency would need to run at roughly 55% per year: the 30% already in the model, plus an additional 25% on top. That additional 25% is the escape route. We modeled it exhaustively.
The modeled incremental efficiency rate — what is actually achievable beyond what is already deployed — is approximately 5% per year. And it is decelerating.
Why decelerating? Because the industry is approaching hard architectural floors under the dominant transformer-serving paradigm. Four-bit precision is effectively the quantization wall — you cannot compress a weight below the information entropy the model requires to function. The KV-cache floor sits at approximately 70 kilobytes per token under current architectures. These are not immutable laws of physics. Breaking them requires architectural change — new attention mechanisms, fundamental serving paradigm shifts — not another normal year of optimization.
The large wins — MLA, FP8, sparse attention — were one-time architectural steps. Each was a discontinuous improvement. The next generation of incremental optimization is working in the diminishing returns zone. 5% per year against a required 25% additional is not close. It is not in the same order of magnitude.
PART III: THE MEMORY TIERING ESCAPE HATCH — WHY IT DOESN'T WORK
The second version of the bull case for cooling demand is architectural: CXL pooling and flash memory tiers will absorb demand and reduce HBM dependency. We stress-tested this one too. The conclusion is similar: additive, not substitutive.
Here is the anatomy of why. Every inference workload has a temperature profile. The cold side — cached prefixes, reusable context, prefill compute — can be served from slower memory. CXL-attached memory at hundreds of nanoseconds to low microseconds works here. NVMe and high-bandwidth flash are viable for read-mostly cold context. Remote object storage serves the far-cold tier. Each layer is additive: it grows what is servable without replacing what needs HBM.
But the hot decode set is different. It is the memory a GPU touches on every single token generation. The latency requirement is measured in nanoseconds. Nothing in the CXL-to-flash tier can serve it. This boundary is not a software preference — it is drawn in silicon by the bandwidth and latency requirements of autoregressive generation.
NVIDIA's own roadmap architecture reflects this precisely. Rubin CPX — announced as a massive-context inference GPU with 128GB of GDDR7 — was designed specifically for prefill workloads on million-token coding and video tasks. It is an explicit architectural acknowledgment that GDDR7 can absorb a portion of what was previously HBM territory. Subsequent GTC roadmap discussions have centered on Groq 3 LPU integration and Rubin HBM4. The specific CPX form factor may evolve — but the underlying split it represents is durable: prefill and cold context can migrate off HBM, while hot decode compute remains pinned by latency and bandwidth physics.
The quantitative close: balancing HBM supply in 2028 would require moving roughly three-quarters of all KV traffic off HBM. The physical ceiling for cold-tier offload is nowhere near that number. The tiering story grows the total addressable compute. It does not shrink what needs HBM.
JEVONS PARADOX IN SILICON No GPU generation has shipped with less memory per system. H100 launched at 80GB. H200 pushed to 141GB. The GB200 Grace Blackwell Superchip ships at 372GB HBM3E — 13.4TB per NVL72 rack. Blackwell Ultra and Rubin will go higher. Every byte that software efficiency reclaims gets reinvested immediately into longer context windows, larger batch sizes, and more concurrent agent threads. Agent tasks now consume millions of tokens each. The demand curve does not normalize. It re-inflects upward. This is Jevons Paradox applied to compute architecture — efficiency gains increase total consumption rather than reducing it. |
PART IV: THE INVESTMENT IMPLICATIONS
If both escape routes are closed, the structural setup for HBM suppliers is more durable than most current models price. Here is what that means company by company.
SK hynix: The dominant HBM3E supplier has the most direct exposure to a demand picture that does not self-correct. Its structural position is not a cycle call — it is a supply architecture call. As long as the hot decode set is pinned to HBM, and as long as HBM3E remains the only product that can serve it at scale, hynix's pricing power does not erode through demand normalization.
Micron Technology: The narrative that Micron is a late-cycle catch-up trade depends implicitly on HBM demand cooling before Micron's HBM ramp peaks. This stress test complicates that narrative. If demand does not cool, Micron's ramp catches a rising tide rather than a receding one. The timeline risk shifts from execution to geopolitics.
Samsung: Samsung is not a simple qualification binary anymore. Reuters reporting in January 2026 indicated Samsung was preparing HBM4 production for NVIDIA supply after passing HBM4 qualification tests. The investment question has shifted: can Samsung convert qualification into high-volume, high-yield supply fast enough to compress SK hynix's pricing premium? In a demand environment that does not self-correct, every quarter Samsung spends below full-volume qualified status is irreversible revenue transfer — not just a timing delay.
The equipment and packaging layer: The primary beneficiaries of durable HBM demand extend well beyond etch and deposition. The HBM production chain requires advanced bonding, packaging, metrology, and yield management at every layer. Lam Research and Tokyo Electron benefit on the front-end; advanced packaging and bonding specialists benefit on the back-end. The supply chain bottleneck is real and does not disappear just because somebody posted a thread about efficiency.
WINNERS & LOSERS
COMPANY / SECTOR | VERDICT | WHY IT MATTERS | RISK |
SK hynix | STRUCTURAL WINNER | HBM3E dominance maps directly to the hot-decode pinning thesis. Demand durability validates pricing power that consensus treats as cyclical. | Any acceleration in HBM3E qualification by Samsung would compress hynix's pricing premium faster than supply durability implies. |
Micron Technology | RISING TIDE PLAY | HBM ramp enters a demand environment that does not self-correct. Execution risk shifts from catching the wave to catching it before geopolitical risk changes the game. | China market exclusion limits Micron's total addressable HBM market. Any US-China policy escalation hits Micron disproportionately. |
Samsung | VOLUME RAMP WATCH | Qualification is no longer the binary. The question is whether Samsung converts HBM4 qualification into high-volume, high-yield supply fast enough to compress hynix's pricing premium. | Volume ramp execution risk is event-driven. Share gained by Samsung compresses hynix pricing faster than demand durability allows. |
Lam / TEL / AMAT Packaging & Bonding (BESI, AMKR, ASE) Inspection (ONTO, KLAC) | DURABLE TAILWIND | HBM is not just etch and deposition. Advanced bonding, packaging, metrology, and yield management across every stack layer extend the capex cycle for the entire equipment chain. | Policy escalation on tool exports. Capex concentration in a small number of customers creates lumpiness across the chain. |
ASML | WATCH LIST | HBM demand durability supports DRAM capex broadly. EUV remains essential for leading-edge planar shrinks that are not directly threatened by the tiering narrative. | 3D DRAM advancement outside EUV's reach remains a marginal multiple pressure. Not an existential thesis, but a complication for premium valuation. |
"Efficiency Will Fix It" Narrative | NARRATIVE — STRESS-TESTED | Modeled incremental efficiency: ~5%/yr. Required to flip 2028 to surplus: ~25% additional on top of the 30% already priced in. The math does not close by a factor of five. | Production KV compression clearing 5x+, a GPU generation shipping lower memory per rack, or flash absorbing the hot decode set would force a full model revision. |
PRESSURE POINTS
PRESSURE POINT | WHAT TO WATCH | TIME HORIZON |
KV Compression Breakthrough | Any publicly documented production deployment of KV compression exceeding 5x at hyperscale. This is the one technical development that would materially change the efficiency calculus. | 2026–2027 |
NVIDIA Inference Roadmap Memory Split | Watch the HBM/GDDR7/SRAM allocation across CPX, Groq 3 LPX rack integration, and Rubin HBM4. If NVIDIA keeps adding non-HBM memory paths for prefill or cold inference, the hot/cold boundary is moving. If decode stays attached to HBM-class bandwidth, the shortage thesis survives. | 2026–2027 launch cycle |
Agent Token Consumption Data | Production agent deployments burning millions of tokens per task are the primary offset to efficiency gains. Watch for enterprise AI deployment disclosures that quantify per-task token consumption. | Ongoing |
Samsung HBM Volume Ramp / Share Compression | Samsung passed HBM4 qualification for NVIDIA (Reuters, January 2026). The investment question has shifted to volume ramp velocity and yield durability. Watch for hyperscaler allocation disclosures and Samsung quarterly HBM revenue mix. | Q3–Q4 2026 |
Next GPU Memory Spec | Jevons Paradox in action: watch the memory-per-system figure in the next major GPU platform announcement. If it breaks the rising trend, the model needs revision. It has never broken the trend. | Next major GPU launch |
CREDIBILITY FIREWALL
SOURCED / REPORTED | MODELED / INFERRED | EDITORIAL VIEW |
Google confirmed 7x token growth at I/O 2026 (Google I/O keynote) | ~30%/yr efficiency already priced in: derived from 7x token growth compressing to ~40% memory demand growth | The efficiency tailwind is real — but it is already in the denominator. The debate is about the next increment, not this one |
MLA, FP8→FP4, sparse attention: publicly documented architectural deployments (DeepSeek, Meta, OpenAI technical disclosures, 2024–2025) | Incremental efficiency rate ~5%/yr: modeled from post-deployment trajectory; not an industry-published figure — wide error bars acknowledged | The big architectural steps were one-time events. Treating them as a repeating annual rate is the consensus error |
NVIDIA Rubin CPX uses GDDR7 for prefill (NVIDIA architecture disclosures, Hot Chips 2025) | ~75% KV traffic shift required to balance 2028 supply: modeled from capacity trajectory and cold-tier physical ceilings | The hot/cold boundary is drawn in silicon by NVIDIA's own architecture choices. The market should price it accordingly |
GPU memory per system: 80GB (H100) → 141GB (H200) → 180GB (B100) → 288GB (B200) — public product specifications | 4-bit precision and 70KB/token KV-cache as hard floors: assessed from current model architectures; architectural innovation could shift these | Jevons Paradox is not a prediction about the future. It is a description of every GPU generation that has already shipped |
BEAR CASE SPOTLIGHT
BEAR CASE SPOTLIGHT This model has an honest limitation: nobody publishes memory-per-token data over time. The 5% incremental efficiency figure is our modeled inference, not a disclosed industry metric. Wide error bars apply. Three specific developments would force a full model revision: a production KV compression deployment clearing 5x or higher at hyperscale; a GPU generation shipping with materially lower memory per rack than its predecessor; or the flash tier proving empirically that it can absorb a significant portion of the hot decode set. We assign low probability to all three in the 2026–2028 window. A fourth risk deserves mention: budget elasticity. Jevons Paradox only dominates if enterprise AI budgets keep expanding. If CFOs cap token spend, route aggressively to cheaper models, or force lower-quality inference for marginal workloads, efficiency gains may reduce HBM demand at the margin even when technical demand wants to expand. The bull case requires not just demand durability, but budget durability. This is where the bull case lives — and investors leaning heavily on supply durability should monitor all four signals as falsification criteria. |
FIVE THINGS TO DO WITH THIS INFORMATION
1. Stop discounting HBM holdings on efficiency grounds. The efficiency tailwind is already priced into the demand model. The question is whether incremental efficiency exceeds the base case — and the modeled answer is no, by a factor of five.
2. Watch the NVIDIA Rubin CPX memory split announcement closely. The ratio of GDDR7 to HBM in that architecture is NVIDIA's own published view on how much compute has moved off HBM. It is the most credible data point you can get on the hot/cold boundary.
3. Treat the Jevons Paradox as a structural feature, not an anecdote. Every GPU generation has shipped with more memory per system. Until one breaks that trend, efficiency gains are fuel for demand expansion, not demand compression.
4. Monitor enterprise AI deployment disclosures for per-task token data. Agent workflows burning millions of tokens per task are the mechanism that keeps demand growing faster than efficiency closes the gap. When public companies start disclosing per-task compute costs, you will have real data for the first time.
5. Samsung's HBM3E qualification is still the most important binary event in memory markets. This stress test does not change that. It just clarifies what the stakes are: qualifying into a demand environment that does not self-correct is worth more than qualifying into a cooling market.
The AI Buildout Has a Physical Layer

Many of today’s data centers are still using copper wiring. The same metal we’ve been using for a hundred years.
At the speeds AI demands with data moving between thousands of GPUs, billions of times a second, copper doesn’t just slow down.
It turns that data into heat. The more you push through it, the worse it gets. There’s no software for fix for that.
So what’s the answer?
Explore the Photonics Layer…..
Tuttle Capital Pure Play Photonics ETF (FOTO)
Distributor: Foreside Fund Services | Investing involves risk including possible loss of principle.
News vs. Noise: What’s Moving Markets Today
The big news of the day is the launch of the SK Hynix ADR. As with the SpaceX IPO, demand will be extreme, we have no idea how this will impact memory stocks (currently down pre market) or the market as a whole.
Not sure what to make of this yet…..
New York Fed President John Williams then supplied the part bulls would rather ignore: AI infrastructure investment is fueling inflation now, even if it may lower inflation later. If that demand keeps outrunning supply, he said the Fed should not look through it. Add a Strait of Hormuz where tanker traffic is near a standstill, Brent headed for a 6% weekly gain, and September hike odds at 63%. The AI boom is real. So is the inflation bill.
The QQQs had an undercut and rally at the 50 day moving average yesterday….

This market just looks like it wants to go sideways for a bit here.
Where Does the Money Go When AI Hits a Wall?

When capital chases a tech theme, it tends to pile into the most obvious
layer and miss the one underneath. AI spending is now bumping hard
against memory. Hyperscalers — the big cloud builders like Amazon,
Google, and Microsoft — have shifted memory from 8% of their build
budgets to an estimated 30% in a single cycle. That capital has to go
somewhere. If the constraint is memory, and the build can't move without
it, shouldn't an investor own the layer AI runs on?
View HBMX fund holdings →
Distributor: Foreside Fund Services | Investing involves risk including
possible loss of principal.
<Link = http://www.hbmxetf.com/>
ETF News
A Stock I’m Watching

This is the pre merger SPAC that is taking Agility public. It will be the only pure play robotics name out there.
In Case You Missed It
Great conversation on wide ranging topics with Kenny Polcari…
The H.E.A.T. (Hedge, Edge, Asymmetry and Theme) Formula is designed to empower investors to spot opportunities, think independently, make smarter (often contrarian) moves, and build real wealth.
The views and opinions expressed herein are those of the Chief Executive Officer and Portfolio Manager for Tuttle Capital Management (TCM) and are subject to change without notice. The data and information provided is derived from sources deemed to be reliable but we cannot guarantee its accuracy. Investing in securities is subject to risk including the possible loss of principal. Trade notifications are for informational purposes only. TCM offers fully transparent ETFs and provides trade information for all actively managed ETFs. TCM's statements are not an endorsement of any company or a recommendation to buy, sell or hold any security. Trade notification files are not provided until full trade execution at the end of a trading day. The time stamp of the email is the time of file upload and not necessarily the exact time of the trades. TCM is not a commodity trading advisor and content provided regarding commodity interests is for informational purposes only and should not be construed as a recommendation. Investment recommendations for any securities or product may be made only after a comprehensive suitability review of the investor’s financial situation.© 2026 Tuttle Capital Management, LLC (TCM). TCM is a SEC-Registered Investment Adviser. All rights reserved.
